[
    {
        "BriefDescription": "Read CAS command sent to DRAM",
        "Counter": "0,1,2,3,4",
        "EventCode": "0x22",
        "EventName": "UNC_M_CAS_COUNT_RD",
        "PerPkg": "1",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Write CAS command sent to DRAM",
        "Counter": "0,1,2,3,4",
        "EventCode": "0x23",
        "EventName": "UNC_M_CAS_COUNT_WR",
        "PerPkg": "1",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Total number of read and write byte transfers to/from DRAM, in 32B chunk, per DDR channel. Counter increments by 1 after sending  or receiving 32B chunk data.",
        "Counter": "0,1,2,3,4",
        "EventCode": "0x3C",
        "EventName": "UNC_M_TOTAL_DATA",
        "PerPkg": "1",
        "Unit": "iMC"
    }
]